Near-field communication (NFC) systems involve active devices, which have a power supply, and passive devices which typically do not. Active devices generate large radio-frequency signals which are used to communicate with the passive devices, but also to power them through magnetic induction. Thus, when the active device is brought sufficiently close to the passive device (typically under 20 cm), the RF field generated by the active device is used to power the passive device. In this application, active devices are termed Readers, while passive devices are termed Tags.
The Reader of an NFC system, when communicating with a passive Tag, is required to provide a large input signal level so the energy in the signal can be harvested by the Tag in order to provide the power it needs to function correctly. During communications from the Reader to the Tag, the large RF signal generated by the Reader is modulated with data; the Tag is then required to recover the data by demodulation. During communications from the Tag to the Reader, the Reader provides a large, unmodulated RF field which can be used to power the Tag. The Tag can then communicate back to the Reader by loading the RF field in an on/off keying way that is referred to as load modulation. The modulation can be based on amplitude, phase, or a combination of both. However, the amplitude of the modulation is much lower than the amplitude of the RF signal.
The Reader receiver is therefore required to demodulate a signal consisting of a large amplitude carrier with a very low level modulation. The analogue-to-digital converter (ADC) in the receiver will therefore need to be sized in terms of the number of bits so the inputted signal does not amplitude limit but still permits the small levels of modulation to be detected without an undue amount of ADC produced quantisation noise. This can lead to a complex ADC requirement with a large number of bits.
When analogue receivers are used for NFC, the input signal is mixed down to baseband so that the large carrier signal becomes a DC level. Usually a low-pass filter with an integrator in its feedback loop can be used to attenuate the DC signal without affecting the modulation, thereby reducing the composite input signal to the ADC and reducing the need for a complicated ADC. With a bandpass ADC that digitises the 13.56 MHz input signal, however, this technique cannot be used.